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 Genesys Logic, Inc.
GL819
USB 2.0 Generation 3 Multi-I/F Card Reader Controller
Version-11/13
Datasheet Revision 1.03 Oct. 16, 2007
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
Copyright:
Copyright (c) 2007 Genesys Logic Incorporated. All rights reserved. No part of the materials may be reproduced in any form or by any means without prior written consent of Genesys Logic, Inc.
Disclaimer:
ALL MATERIALS ARE PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NO LICENSE OR RIGHT IS GRANTED UNDER ANY PATENT OR TRADEMARK OF GENESYS LOGIC INC.. GENESYS LOGIC HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS IN REGARD TO MATERIALS, INCLUDING ALL WARRANTIES, IMPLIED OR EXPRESS, OF MERCHANTABILITY, FITNESS FOR ANY PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF INTELLECTUAL PROPERTY, INCLUDING, WITHOUT LIMITATION, THE X-D PICTURE CARDTM LICENSE. IN NO EVENT SHALL GENESYS LOGIC BE LIABLE FOR ANY DAMAGES INCLUDING, WITHOUT LIMITATION, DAMAGES RESULTING FROM LOSS OF INFORMATION OR PROFITS. PLEASE BE ADVISED THAT THE MATERIALS MAY CONTAIN ERRORS OR OMMISIONS. GENESYS LOGIC MAY MAKE CHANGES TO THE MATERIALS OR TO THE PRODUCTS DESCRIBED THEREIN AT ANY TIME WITHOUT NOTICE.
Trademarks:
is a registered trademark of Genesys Logic, Inc. All trademarks are the properties of their respective owners.
Office:
Genesys Logic, Inc. 12F, No. 205, Sec. 3, Beishin Rd., Shindian City, Taipei, Taiwan Tel: (886-2) 8913-1888 Fax: (886-2) 6629-6168 http://www.genesyslogic.com
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
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GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
Revision History
Revision 1.00 1.01 1.02 1.03 Date 09/27/2006 03/22/2007 04/30/2007 10/16/2007 First formal release 1. Pin List, Ch3.2, p.10 2. Pin Out, Ch3.3, p.11 3. Absolute Maximum Ratings, Ch6.1, p16 4. DC Characteristics, Ch6.3, p.16 Remove over current protection support Modify: 1. SD Interface Timing, , Ch6.5.7, p.29, 30 2. SD_WP description, Table3.2, p.12 Description
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
Page 3
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
TABLE OF CONTENTS CHAPTER 1 GENERAL DESCRIPTION................................................... 7 CHAPTER 2 FEATURES .............................................................................. 8 CHAPTER 3 PIN ASSIGNMENT................................................................. 9 3.1 PINOUT ....................................................................................................... 9 3.2 PIN LIST.................................................................................................... 10 3.3 PIN DESCRIPTIONS ................................................................................... 11 CHAPTER 4 BLOCK DIAGRAM.............................................................. 14 CHAPTER 5 FUNCTIONAL DESCRIPTION ......................................... 15 CHAPTER 6 ELECTRICAL CHARACTERISTICS............................... 16 6.1 ABSOLUTE MAXIMUM RATINGS.............................................................. 16 6.2 OPERATING CONDITIONS......................................................................... 16 6.3 DC CHARACTERISTICS ............................................................................ 16 6.4 PMOS CHARACTERISTICS ...................................................................... 17 6.5 AC CHARACTERISTICS ............................................................................ 18 6.5.1 UTMI Transceiver .......................................................................... 18 6.5.2 External Flash ................................................................................. 18 6.5.3 SmartMedia ..................................................................................... 20 6.5.4 xD...................................................................................................... 25 6.5.5 Memory Stick .................................................................................. 26 6.5.6 Memory Stick PRO......................................................................... 27 6.5.7 Secure Digital / MultiMedia Card................................................. 29 6.5.8 CompactFlash Card........................................................................ 31 6.5.9 EEPROM 93C46 Timing................................................................ 32 CHAPTER 7 PACKAGE DIMENSION..................................................... 33 CHAPTER 8 ORDERING INFORMATION ............................................ 34
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
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GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
LIST OF FIGURES
FIGURE 3.1 - 128 PIN LQFP PINOUT DIAGRAM ................................................................. 9 FIGURE 4.1 - BLOCK DIAGRAM ......................................................................................... 14 FIGURE 6.1 - EMBEDDED PMOS SWITCH ARCHITECTURE.............................................. 17 FIGURE 6.2 - V-I CURVE OF PMOS SWITCH @ 25 C ..................................................... 17 FIGURE 6.3 - TIMING DIAGRAM OF EXTERNAL FLASH .................................................... 18 FIGURE 6.4 - TIMING DIAGRAM OF SMARTMEDIA........................................................... 23 FIGURE 6.5 - TIMING DIAGRAM OF MEMORYSTICK ........................................................ 26 FIGURE 6.6 - TIMING DIAGRAM OF MEMORYSTICK PRO ............................................... 27 FIGURE 6.7 - TIMING DIAGRAM OF SECURE DIGITAL / MULTIMEDIA CARD.................. 29 FIGURE 6.8 - TIMING DIAGRAM OF COMPACTFLASH ...................................................... 31 FIGURE 6.9 - TIMING DIAGRAM OF EEPROM 93C46 ..................................................... 32 FIGURE 7.1 - GL819 128 PIN LQFP PACKAGE................................................................. 33
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
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GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
LIST OF TABLES
TABLE 3.1 - PIN LIST.......................................................................................................... 10 TABLE 3.2 - PIN DESCRIPTIONS ......................................................................................... 11 TABLE 6.1 - ABSOLUTE MAXIMUM RATINGS.................................................................... 16 TABLE 6.2 - OPERATING CONDITIONS .............................................................................. 16 TABLE 6.3 - DC CHARACTERISTICS .................................................................................. 16 TABLE 6.4 - PMOS DRIVING STRENGTH VERSUS JUNCTION TEMPERATURE ................. 17 TABLE 6.5 - PMOS DRIVING STRENGTH VERSUS JUNCTION TEMPERATURE ................. 17 TABLE 8.1 - ORDERING INFORMATION ............................................................................. 34
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
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GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
CHAPTER 1 GENERAL DESCRIPTION
The GL819 is the 3rd generation USB 2.0 Multi-Interface Flash Card Reader controller. It supports USB 2.0 high-speed transmission to: CompactFlash (CF) Type I/II, Micro Drive, Secure Digital (SD), Mini SDTM, MultiMediaCard (MMC), TM RS MultiMediaCardTM (RS MMC), HS-MMC, MMC-Mobile , Memory Stick (MS), Memory Stick DuoTM TM TM (MS Duo), High Speed Memory Stick (HS MS), Memory Stick PRO (MS PRO), Memory Stick PROTM TM TM Duo (MS PRO Duo) Memory Stick ROM, and SmartMedia (SM) 5V/3.3V and xD-Picture Card (xD)on one chip. Besides the flash card interface controller each, the GL819 integrates Genesys Logic own design USB 2.0 high-speed UTMI (USB 2.0 Transceiver Macrocell Interface) transceiver. As a single chip solution for USB 2.0 multi flash card reader, the GL819 complies with Universal Serial Bus specification rev. 2.0, USB Storage Class specification ver.1.0, and flash card interface specification each. The GL819 can support different kinds of multi-interface combinations. For the best performance consideration, the GL819 integrates high efficiency card interface hardware engine for data transfer. The GL819 also supports firmware upgrade via USB interface, and external flash read/ write for firmware upgrade and other applications. The GL819 pin assignment design fits to card sockets to provide easier PCB layout. Package type is 128-pin LQFP (14mm x 14mm), the GL819 can fit your various designs in both standalone and PC embedded USB 2.0 multi-interface flash card reader/ writer applications.
TM TM TM
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
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GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
CHAPTER 2 FEATURES
USB specification compliance - Comply with 480Mbps Universal Serial Bus specification rev. 2.0. - Comply with USB Storage Class specification rev. 1.0. Support 1 device address and up to 4 endpoints: Control (0)/ Bulk Read (1)/ Bulk Write (2)/Interrupt (3). Integrated USB building blocks - USB2.0 transceiver macro (UTM), Serial Interface Engine (SIE), Build-in power-on reset (POR) and low-voltage detector (LVD) Embedded 8051 micro-controller - Operate @ 60 MHz clock, 12 clocks per instruction cycle - Embedded 48K-byte mask ROM and internal 256 byte SRAM - Embedded 4K-byte external SRAM - Support up to external 48K code ROM Support firmware upgrade to external flash via USB ( ISP : in system programming ) USB 2.0 certified (Test ID=40002675) WHQL submission number 938163 Vista submission number 1220953 On-Chip power MOSFETs to control flash media card power. CompactFlashTM interface - Support CFA specification v2.1 / v3.0 - Support True IDE mode - Support 8 / 16 bit data mode and different timing SmartMediaTM interface 8 bit data width and different speed Support different page size, and automatic append redundant area data (8 / 16 bytes)
xD-Picture Interface ( Submission ID: AA-RG0435 ) - Compliant with xD-Picture specification v1.2B. - xD-Picture Type M/H card support. MemoryStickTM / MemoryStick PRO interface - Compliant with MemoryStick interface specification v1.40-00 - Compliant with MemoryStick PRO interface specification v1.00-01 - Support automatic CRC16 generation and verification Secure Digital and MultiMediaCard - Compliant with Secure Digital specification v2.0 - Compliant with MMC interface specification v4.2 (external flash) Support both SD / MMC mode access CLK/CMD/DAT0/DAT1/DAT2/DAT3/DAT4/DAT5/DAT6/DAT7 - Support SD specification v1.0 / v1.1 / v2.0 - Support MMC specification v4.0 / v4.1 / v4.2(ext flash support) x1 / x4 / x8 data transmission. - Automatic CRC7 generation for command and CRC7 verification for response on CMD - Support automatic CRC16 generation and verification on DAT0:7
In addition to full packet transaction, optional single byte / bit operation on both CMD and DAT line / lines
TM TM
-
Process data in block or byte
High efficient hardware engine - Automatic data read / write with card by hardware engine - Easier firmware development On board 12 MHz Crystal driver circuit Available in 128-pin LQFP 14x14 mm package (c)2000-2007 Genesys Logic Inc. - All rights reserved. Page 8
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
CHAPTER 3
3.1 Pinout
PIN ASSIGNMENT
GPIO2/MMC_D6 GPIO1/MMC_D5
IORDY NVMA0 NVMA1 CF_D14 CF_D15 GPIO8
GPIO10/SM_D1
CF_D3 CF_D4 CF_CDZ SM_WPDZ MS_BS CF_D5 CF_D13 SD_CLK SD_CMD PMOSO3 VDD33_3 DGND_4 CF_D6 CF_D7 SD_D3 SD_D2 NC NVMA2 NVMA3 PMOSO1 VDD33_4 NVMD5 NVMD4
GPIO0/MMC_D4
GPIO7/SM_D7
97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128
96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
CF_D10 CF_D9 CF_D8 SM_CLE MS_INS MS_D1 VDD33_2 PMOSO2 NVMD0 NVMD1 NVMD2 NVMD3 CF_D2 CF_D1 CF_D0 DGND_3 SM_CDZ MS_D0 MS_D2 MS_D3 NC NVMA15 NVMA14 EXTRSTZ 93V46_DI 93C46_DO SM_ALE SD_D0 GPIO13 CF_A0
CF_A1 CF_A2 GPIO14 GPIO4/SM_D4
GPIO3/MMC_D7
NVMA13
GPIO11/SM_D2
GL819
LQFP - 128
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
SM_WPZ MS_CLK MVMA8 NVMA9 NVMA11 NVMOEZ DGND_2 SM_RBZ SD_WEZ SD_CDZ SD_WP VDD33_1 PMOSO4 NVMA10 NVMCSZ NVMD7 NVMD6 SD_D1 SM_REZ CF_RST NVMWEZ AGND2 X1 X2 AVDD2
CF_CS0Z CF_CS1Z CF_IORZ CF_IOWZ NVMA4 NVMA5 NVMA6 93C46_SK 93C46_CS GPIO15 XD_CDZ NVMA7 NVMA12
Figure 3.1 - 128 Pin LQFP Pinout Diagram
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
GPIO9/SM_D0 GPIO12/SM_D3
GPIO5/SM_D5 GPIO6/SM_D6
AVDD1_1 AVDD1_2 RREF AGND1_1 AGND1_2 DM DP AVDD1_3 NC AGND1_3 DGND_1 NC NC
CF_D11 CF_D12
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GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
3.2 Pin List
Table 3.1 - Pin List
Pin# 1 2 3 4 5 6 7 8 9 Pin Name CF_CS0Z CF_CS1Z CF_IORZ CF_IOWZ NVMA4 NVMA5 NVMA6 93C46_SK 93C46_CS Type Pin# O O O O O O O O O B I O O B B B B B B P P A A A A A P A P Pin Name Type Pin# P B I P O O O B B B O O P P I I O I P O O O O O B B O B B B O O Pin Name Type Pin# O B B O O I Pin Name Type I O O B B B B B B I I O B B O B P P P B B B B O O P P B B B B
33 AVDD2 34 X2 35 X1 36 AGND2 37 NVMWEZ 38 CF_RST 39 SM_REZ 40 SD_D1 41 NVMD6 42 NVMD7 43 NVMCSZ 44 NVMA10 45 PMOSO4 46 VDD33_1 47 SD_WP 48 SD_CDZ 49 SM_WEZ 50 SM_RBZ 51 DGND_2 52 NVMOEZ 53 NVMA11 54 NVMA9 55 NVMA8 56 MS_CLK 57 SM_WPZ GPIO11/ 58 SM_D2 59 NVMA13 GPIO3/ 60 MMC_D7 GPIO4/ 61 SM_D4 62 GPIO14 63 CF_A2 64 CF_A1
65 CF_A0 66 GPIO13 67 SD_D0 68 SM_ALE 69 93C46_DO 70 93C46_DI 71 EXTRSTZ 72 NVMA14 73 NVMA15 74 NC 75 MS_D3 76 MS_D2 77 MS_D0 78 SM_CDZ 79 DGND_3 80 CF_D0 81 CF_D1 82 CF_D2 83 NVMD3 84 NVMD2 85 NVMD1 86 NVMD0 87 PMOSO2 88 VDD33_2 89 MS_D1 90 MS_INS 91 SM_CLE 92 CF_D8 93 CF_D9 94 CF_D10 GPIO1/ 95 MMC_D5 GPIO2/ 96 MMC_D6
97 IORDY 98 NVMA0 99 NVMA1 100 CF_D14 101 CF_D15
102 GPIO8 GPIO10/ I,PU 103 SM_D1 O 104 CF_D3 O B B B I P B B B B B B B P P B I O B B B B B 105 CF_D4 106 CF_CDZ 107 SM_WPDZ 108 MS_BS 109 CF_D5 110 CF_D13 111 SD_CLK 112 SD_CMD 113 PMOSO3 114 VDD33_3 115 DGND_4 116 CF_D6 117 CF_D7 118 SD_D3 119 SD_D2 120 NC 121 NVMA2 122 NVMA3 123 PMOSO1 124 VDD33_4 125 NVMD5 126 NVMD4 GPIO0/ 127 MMC_D4 GPIO7/ 128 SM_D7
10 GPIO15 11 XD_CDZ 12 NVMA7 13 NVMA12 GPIO5/ 14 SM_D5 GPIO6/ 15 SM_D6 16 CF_D11 17 CF_D12 GPIO9 18 SM_D0 GPIO12/ 19 SM_D3 20 AVDD1_1 21 AVDD1_2 22 RREF 23 AGND1_1 24 AGND1_2 25 DM 26 DP 27 AVDD1_3 28 NC 29 AGND1_3 30 DGND_1 31 NC 32 NC
Note: For NC pins, please leave them unconnected (floating).
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
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GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
3.3 Pin Descriptions
Table 3.2 - Pin Descriptions
Pin Name
CF_CS0Z
Pin# 1 2 3 4 98,99,121, 122,5~7,12, 55,54,44,53, 13,59,72,73 8 9
Type O O O O O O O I B B B B B P A A A A P P B CF CS0# CF_CS1# CF IOR# CF IOW# Ext. flash address 0~15 93C46 Clock 93C46 CS
Description
CF_CS1Z CF_IORZ CF_IOWZ NVMA0~15 93C46_SK 93C46_CS xD_CDZ GPIO0~3/ MMC_D4~7 GPIO4~7/ SM_D4~7 GPIO9~12/ SM_D0~3
11 127,95,96, 60 61,14,15, 128 18,103,58, 19 102,66,62, GPIO8,13~15 10 CF_D8~12 92~94,16,17 AVDD1_1~3 RREF AGND1_1~3 DM DP DGND_1~4 AVDD2 X2 20,21,27 22 23,24,29 25 26
30,51,79,115
xD-Picture card detection pin, normal high, active low. GPIO0~3 / MMC data 4~7 GPIO4~7 / SM data 4~7 GPIO9~12 / SM data 0~3 GPIO8, 13~15 CF data 8~12 Analog power #1 Reference resistor Analog ground 1~3 USB DUSB D+ Digital ground Analog power #2 12MHz Crystal This is the other terminal of the crystal, or left open when an external clock source is used to drive XTAL/CLK. 12MHz Crystal This pin can be connected to one terminal of the crystal or can be connected to an external 12MHz clock when a crystal is not used. Analog ground #2 Ext. flash WE# CF reset (active-low) SmartMedia RE# SD DAT0~3 Ext. flash data 0~7
33 34
X1 AGND2 NVMWEZ CF_RST SM_REZ SD_D0~3 NVMD0~7
35 36 37 38 39 67,40,119, 118, 86~83,126, 125,41,42
I P O O O B B
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GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
NVMCSZ VDD33_1~4 SD_WP SD_CDZ SM_WEZ SM_RBZ NVMOEZ MS_CLK
SM_WPZ CF_A0~2
43 46,88,114, 124 47 48 49 50 52 56 57
65~63
O P I I O I O O B O O O I I,PU B I B P P P P I O I B I I O O B
Ext. flash CS# Digital power 3.3V SD Write Protect Detection, this pin is an active high write
protect signal for the SD device; Default high when card inserted.
SD Card detection#, this is the card detection signal from SD device to indicate if the device is inserted, Normal high. SmartMedia WE# SmartMedia RDY/BSY# Ext. flash OE# Memory Stick SCLK output. SmartMedia WP# CF address 0~2 SmartMedia ALE 93C46 Data out 93C46 Data in External reset #, the active low signal is used by the system to reset the chip, The active low pulse should be at least 1 us wide. Not connected MS DAT0~3 SmartMedia CD#, this is the card detection signal from SM device to indicate if the device is inserted, active low. CF Data 0~7, 13 PMOS1: SM/XD Power MOS output (250mA output for idea) PMOS2: MS Power MOS output(250mA output for idea) PMOS3: SD Power MOS output(250mA output for idea) PMOS4: CF Power MOS output(250mA output for idea) or Access LED Memory Stick INS SmartMedia CLE CF IORDY CF data 14~15 CF CD# . CF card detection, this pin is connected to the ground on the CF card, when the CF device is inserted. SmartMedia Write Protect Detect, this pin is an active low write protect signal for the SM device, when SM is enable. Normal high. MemoryStick BS SD/MMC CLK SD/MMC CMD
SM_ALE 93C46_DO 93C46_DI EXTRSTZ
NC
68 69 70 71 28,31,32,74, 120 77,89,76,75
78
MSD0~3 SM_CDZ
CF_D0~7,13
PMOSO1 PMOSO2 PMOSO3 PMOSO4 MS_INS SM_CLE IORDY CF_D14~15 CF_CDZ SM_WPDZ MS_BS SD_CLK SD_CMD
80~82,104, 105,109, 116,117,110 123 87 113 45 90 91 97 100,101 106 107 108 111 112
Note: (c)2000-2007 Genesys Logic Inc. - All rights reserved. Page 12
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
Type O I B IPU IPD P A Output Input Bi-directional Input with internal pull-up Input with internal pull-down Power / Ground Analog
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
Page 13
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
CHAPTER 4 BLOCK DIAGRAM
MHE MHE Control EPFIFO EP0 FIFO (64B) EP3 FIFO (64B) BULK FIFO (512B*2) SIE
MS/MS-Pro
MIF
SM/XD MIF
(With ECC)
SD/MMC MIF
Register SIE/ FIFO/ MHE Control
8051 Core
CF MIF
Mask ROM (48K)
SRAM 256B LUT 4KB
UTMI
Figure 4.1 - Block Diagram
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
Page 14
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
CHAPTER 5 FUNCTIONAL DESCRIPTION
UTMI
The USB 2.0 Transceiver Macrocell, it's the analog circuitry that handles the low level USB protocol and signaling, and shifts the clock domain of the data from the USB 2.0 rate to one that is compatible with the general logic.
SIE
The Serial Interface Engine, which contains the USB PID and address recognition logic, and other sequencing and state machine logic to handle USB packets and transactions.
EPFIFO
Endpoint FIFO includes Control FIFO (FIFO0), interrupt FIFO (FIFO3), Bulk In/Out FIFO (BULKFIFO) Control FIFO FIFO of control endpoint 0. It is 64-byte FIFO, and it is used for endpoint 0 data transfer. Interrupt FIFO 64-byte depth FIFO of endpoint 3 for status interrupt Bulk In/Out FIFO It can be in the TX mode or RX mode:
1. It contains ping-pong FIFO (512 bytes each bank) for transmit/receive data continuously.
2. It can be directly accessed by Uc 3. Support automatic hardware SmartMedia ECC error correction
MHE
It contains 5 MIF (Media Interface) MIFs 1. CF/Micro Drive MIF 2. SmartMedia/xD/Flash MIF 3. SD/MMC MIF 4. MemoryStick MIF 5. MemoryStick PRO MIF
8051 Core/SRAM/LUT/Mask ROM
An 8-bit Micro-controller to manage card operation, card power, USB Storage Class, data transfer between USB and card interface, and GPIOs control
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
Page 15
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
CHAPTER 6 ELECTRICAL CHARACTERISTICS
6.1 Absolute Maximum Ratings
Table 6.1 - Absolute Maximum Ratings
Parameter Value
Storage Temperature Ambient Temperature Supply Voltage to Ground Potential DC Input Voltage to Any Pin
-40C to + 125C 0C to + 70C -0.5V to + 4.0V -0.5V to + 5.8V
6.2 Operating Conditions
Table 6.2 - Operating Conditions
Parameter Value
Ta (Ambient Temperature Under Bias) Supply Voltage Ground Voltage FOSC (Oscillator or Crystal Frequency)
0C to 70C +3.0V to +3.6V 0V 12 MHz 0.05% 12 MHz 0.25% (for USB full-speed only)
6.3 DC Characteristics
Table 6.3 - DC Characteristics
Symbol Parameter Condition Min. Typ. Max. Unit
VCC VIH VIL
Supply Voltage Input High Voltage Input Low Voltage
3.0 2.0 -0.3 0 < VIN < VCC (The value is under without the pull-up or pull-down -10 resistance, It means it is the value that the pin state is Hi-z) 2.4 VDD=3.3V VOH=2.4V VDD=3.3V VOL=0.4V 1.5K external pull-up included Connect to USB with 8051 operating without the card -
-
3.6 3.6 0.8
V V V
II
Input Leakage current
-
10
A
VOH VOL IOH IOL ISUSP ICC
Output High Voltage Output Low Voltage Output Current High Output Current Low Suspend current Supply current
8 8
0.4 450 90
V V mA mA A mA
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Page 16
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
6.4 PMOS Characteristics Before over-current dectection:
Table 6.4 - PMOS Driving Strength versus Junction Temperature
(IO Power=3.3V, Register setting =250mA) Junction Temperature Max. Driving Strength (Ma), PMOS output voltage(V) 70 C 190 20% 2.81v 5% 25 C 202 20% 2.84V 5% 0 C 218 20% 2.85v 5%
When over-current dectection:
Table 6.5 - PMOS Driving Strength versus Junction Temperature
(IO Power=3.3V, Register setting =250mA) Junction Temperature Max. Driving Strength (Ma), PMOS output voltage(V) 70 C 198 20% 2.8v 5% 25 C 215 20% 2.83V 5% 0 C 232 20% 2.84v 5%
Figure 6.1 - Embedded PMOS Switch Architecture
Figure 6.2 - V-I Curve of PMOS Switch @ 25 C
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
Page 17
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
6.5 AC Characteristics 6.5.1 UTMI Transceiver
The GL819 is fully compatible with Universal Serial Bus specification rev. 2.0 and USB 2.0 Transceiver Macercell Interface (UTMI) specification rev. 1.01. Please refer to the specifications for more information.
6.5.2 External Flash
Figure 6.3 - Timing Diagram of External Flash
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Page 18
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
AC Characteristics of Flash Interface (CLOAD = 30pF)
Symbol
Parameter
Max
Unit
tACC tCE tDF tOH tAS tAH tOES tCS tCH tWP tWPH tDS tDH tOEH
Address to Output Delay (max) NVMCSZ to Output Delay (max) NVMCEZ or NVMOEZ, whichever occurred first, to Output Float (max) Output Hold from NVMOEZ, NVMCSZ or Address, whichever occurred first (min) Address Setup Time (min) Address Hold Time (min) NVMOEZ Setup Time (min) NVMCSZ Setup Time (min) NVMCSZ Hold Time (min) Write Pulse Width (min) Write Pulse Width High (min) Data Setup Time (min) Data Hold Time (min) NVMOEZ Hold Time (min)
83 83 0 0 760 760 300 0 0 66 300 300 0 16 ns
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
Page 19
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
6.5.3 SmartMedia
Command Input Cycle SM_CLE tCLS SM_CEZ tCS SM_WEZ tALS SM_ALE tDS SM_D[0:7] tDH tALH tWP tCH tCLH
Address Input Cycle SM_CLE tCLS SM_CEZ tCS SM_WEZ tALS SM_ALE tDS SM_D[0:7] tDH tALH tWP tWH tWC
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Page 20
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
Data Input Cycle SM_CLE tCLH SM_CEZ tCH SM_WEZ tALS SM_ALE tDS tDH SM_D[0:7]
Serial Read Cycle tRC SM_CEZ tRP SM_REZ tCHZ tREA SM_D[0:7] tALS SM_RBZ tRHZ tREH
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GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
Page 22
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
Figure 6.4 - Timing Diagram of SmartMedia
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Page 23
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
AC Characteristics of Smart Media Interface (CLOAD = 30 pF) SYMBOL PARAMETER MIN. MAX. UNIT
tCLS tCLH tCS tCH tWP tALS tALH tDS tDH tWC tWH tWW tRR tRP tRC tREA tCEH tREAID tRHZ tCHZ tREH tRSTO tCSTO tRHW tWHC tWHR tAR1 tCR tWB tAR2 tRB tCRY
CLE Setup Time CLE Hold Time -CE Setup Time -CE Hold Time -WE Pulse Width ALE Setup Time ALE Hold Time Data Setup Time Data Hold Time Write Cycle Time -WE High Hold Time -WP High to -WE Low Ready to -RE Low Read Pulse Width Read cycle Time -RE Access Time (Serial Data Access) -CE High Hold Time (At the Last Serial Read) -RE Access Time (ID Read) -RE High to Output Hi-Z -CE High to Output Hi-Z -RE High Hold Time -RE Access Time -CE Access Time -RE High to -WE Low -WE High to -CE Low -WE High to -RE Low ALE Low to -RE Low (Address Register Read, ID Read) -CE Low to -RE Low (Data Register Read, ID Read) -WE High to Busy ALE Low to RE Low (Read Cycle) Last -RE High to Busy (at Sequential Read) -CE High to Ready
35 45 160 160 50 35 79 48 35 83 33 199 216 67 100 400 10 30 36 160 83 330 235 330 -
25 25 15 10 42 42 100
ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
32 1
ns s
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
Page 24
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
6.5.4 xD The Timing diagrams are the same as SM. AC Characteristics:
Parameter Description Spec. Min Spec. Max GL819 (30pF) 35.2 Unit
tCLS tCLH tCS tCH tWP tALS tALH tDS tDH tWC tWH tWW tRR tRP tRC tREA tCEH tREAID tRHZ tCHZ tREH tRSTO tCSTO tRHW tWHC tWHR TAR1 tCR tWB TAR2 tRB
CLE Set up Time CLE Hold Time CE Setup up Time CE Hold Time WE Pulse Width ALE Setup Time ALE Hold Time Data Setup Time Data Hold Time Write Cycle Time WE High Hold Time WP High to WE Low Ready to RE Low Read Pulse Width Read Cycle Time RE Access Time(Serial Data Access) CE High Hold Time RE Access Time(ID Read) RE High to Output Hi-Z CE High to Output Hi-Z RE High Hold Time RE Access Time CE Access Time RE High to WE Low WE High to CE Low WE High to RE Low ALE Low to RE Low CE Low to RE Low WE High to Busy ALE LOW to RE LOW Last RE High to Busy
20 40 20 40 40 20 40 30 20 80 20 100 20 60 80 45 250 90 5 20 45 55 0 50 60 200 200 200 150 200 30 30
44.6 163.5 163.5 51.9 35.2 95.2 51.9 35.5 83.2 31.7 199 232 68.6 100 25 400 25 26.9 26.9 31.2 10 10 35.2 163 83 366 235 100 352 48 ns
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
Page 25
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
6.5.5 Memory Stick
Figure 6.5 - Timing Diagram of MemoryStick
Memory Stick Frequency Mode Parameter Description Mode Typ Unit Remark
0 FSCLK SCLK frequency 1 2 3
1.5M 6M 15M 20M Hz
AC Characteristics of Memory Stick Interface (CLOAD = 30 pF) PARAMETER DESCRIPTION FSCLK = 1.5 MHZ FSCLK = 6 MHZ FSCLK = 15 MHZ FSCLK = 20 MHZ UNIT
tSCLKc tSCLKwh tSCLKwl
SCLK Cycle SCLK (min) H pulse length
666.6 323.3 323.3
166.6 73.3 73.3
66.6 23.3 23.3
50.0 15 15
ns ns ns Page 26
SCLK L pulse length (min)
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
tSCLKr tSCLKr tSCLKf tSCLKf tBSsu tBSh tDsu tDh tDd
SCLK rise time (min) SCLK rise time (max) SCLK Fall time (min) SCLK Fall time (max) BS setup time (min) BS hold time (min) DATA setup time (min) DATA hold time (min) DATA output delay time (max)
5 10 5 10 5 5 5 5 5
5 10 5 10 5 5 5 5 5
5 10 5 10 5 5 5 5 5
5 10 5 10 5 5 5 5 5
ns ns ns ns ns ns ns ns ns
6.5.6 Memory Stick PRO
Figure 6.6 - Timing Diagram of MemoryStick PRO
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
Page 27
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
Memory Stick PRO Frequency Mode Parameter Description Mode Typ Unit Remark
0 FSCLK SCLK frequency 1 2 3 4 5
1.5M 6M 15M 20M 30M 40M Hz Same as Memory Stick
AC Characteristics of MS Interface (CLOAD = 15 pF) PARAMETER DESCRIPTION FSCLK = 30 MHZ FSCLK = 40 MHZ UNIT
tSCLKc tSCLKwh tSCLKwl tSCLKr tSCLKr tSCLKf tSCLKf tBSsu tBSh tDsu tDh tDd
SCLK Cycle SCLK H pulse length (min) SCLK L pulse length (min) SCLK rise time (min) SCLK rise time (max) SCLK Fall time (min) SCLK Fall time (max) BS setup time (min) BS hold time (min) DATA setup time (min) DATA hold time (min) DATA output delay time (max)
33.3 9 9 5 7.5 5 7.5 8 1 8 1 5
25.0 5 5 5 7.5 5 7.5 8 1 8 1 5
ns ns ns ns ns ns ns ns ns ns ns ns
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
Page 28
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
6.5.7 Secure Digital / MultiMedia Card Normal Mode:
fPP tWL tWH
Clock
tTHL tISU tTLH tIH
Input
tODLY
Output
Figure 6.7 - Timing Diagram of Secure Digital / MultiMedia Card
SD Interface Timing (CL = 30PF) SYMBOL PARAMETER CLOCK RATE UNIT
fPP fOD tWL tWH tTLH tTHL tISU tIH tODLY
Clock frequency Data Transfer Mode Clock frequency Identification Mode Clock low time (min) Clock high time (min) Clock rise time (max) Clock fall time (max) Input set-up time (min) Input hold time (min) Output delay time (max)
24 375 18 18 3 3 5 5 14
20 375 22 22 3 3 5 5 14
15 375 30 30 3 3 5 5 14
6 375 80 80 3 3 5 5 14
MHz KHz ns ns ns ns ns ns ns
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
Page 29
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
High-Speed Mode:
High-Speed Mode:
SD Interface Timing (CL = 30PF) SYMBOL PARAMETER CLOCK RATE UNIT
fPP fOD tWL tWH tTLH tTHL tISU tIH tODLY
Clock frequency Data Transfer Mode Clock frequency Identification Mode Clock low time (min) Clock high time (min) Clock rise time (max) Clock fall time (max) Input set-up time (min) Input hold time (min) Output delay time (max)
48 375 7.4 7.4 3 3 6 2 14
MHz KHz ns ns ns ns ns ns ns
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
Page 30
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
6.5.8 CompactFlash Card
Figure 6.8 - Timing Diagram of CompactFlash
True IDE PIO Mode Read/Write Timing (with CLOAD = 30 pF)
MODE PARAMETER ITEM 0 1 2 3 4 5 6 MODE MODE MODE MODE MODE MODE UNITS
Tcyc Tw
Cycle Time (min) Read/Write Active
600 399
399 266
249 150
183 100
133 83
100 66
83 58
ns ns
Width (min) Read/Write Recovery Trec Time (min) Td Twh Tsu Thr Write Data Setup (min) Write Data Hold (min) Read Data Setup (min) Read Data Hold (min) 0 208 50 5 0 142 35 5 0 109 20 5 0 90 20 5 0 55 20 5 0 40 15 5 0 24 10 5 ns ns ns ns 199 132 99 83 49 33 24 ns
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
Page 31
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
6.5.9 EEPROM 93C46 Timing
Figure 6.9 - Timing Diagram of EEPROM 93C46
AC Characteristics of 93C46 Interface (with CLOAD = 15 pF) PARAMETER DESCRIPTION MINIMUM MAXIMUM UNIT
fSK tWH tWL tTLH tTHL tCSS tCSH tISU tIH tOSU tOH
SK clock frequency SK H pulse length SK L pulse length SK rise time SK fall time CS setup time CS hold time DI setup time DI hold time DO setup time DO hold time
200k 500 500
400k
Hz ns ns ns ns s s s s ns ns Page 32
1
1 1 1 5 5
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
5 10 10


GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
CHAPTER 7 PACKAGE DIMENSION
D D1 D2 D A A2
0.05 S
A1
96 97
65 64
Internal No.
A
E1 E2 E
Green Package
B
GL819 AAAAAAAGAA YWWXXXXXXXX
Date Code Lot Code
Code No.
128 1 32
4X e b
33
bbb H A B D c ddd M C A B s D s
L1
4X
aaa C A B D
01 0
C ccc C
SEATING PLANE
02 R1 H R2
0.25mm
GAGE PLANE
S
L
03 -
NOTES : 1. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.25 mm PER SIDE. D1 AND E1 ARE MAXIMUM PLASTIC BODY SIZE DIMENSIONS INCLUDING MOLD MISMATCH. 2. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL NOT CAUSE THE LEAD WIDTH TO EXCEED THE MAXIMUM b DIMENSION BY MORE THAN 0.08mm. DAMBAR CAN NOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT.
CONTROL DIMENSIONS ARE IN MILLIMETERS. MILLIMETER INCH SYMBOL MIN. NOM. MAX. MIN. NOM. MAX. 1.60 0.063 A 0.006 A1 0.05 0.15 0.002 1.35 1.40 1.45 0.053 0.055 0.057 A2 0.630 BASIC D 16.00 BASIC E 16.00 BASIC 0.630 BASIC 14.00 BASIC 0.551 BASIC D1 14.00 BASIC 0.551 BASIC E1 12.40 BASIC 0.488 BASIC D2 E2 12.40 BASIC 0.488 BASIC 0.08 0.003 R1 R2 0.08 0.20 0.003 0.008 0 3.5 7 0 3.5 7 0 0 0 01 02 11 12 13 11 12 13 03 11 12 13 11 12 13 c 0.09 0.20 0.004 0.008 0.45 0.60 0.75 0.018 0.024 0.030 L 1.00 REF 0.039 REF L1 S 0.20 0.008 b 0.13 0.16 0.23 0.005 0.006 0.009 0.40 BASIC 0.016 BASIC e TOLERANCES OF FORM AND POSITION aaa 0.20 0.008 bbb 0.20 0.008 ccc 0.08 0.003 0.07 0.003 ddd
Figure 7.1 - GL819 128 Pin LQFP Package
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
Page 33
GL819 USB 2.0 Generation 3 Multi-I/F Card Reader Controller
CHAPTER 8 ORDERING INFORMATION
Table 8.1 - Ordering Information
Part Number Package Normal/Green Version Status
GL819MXG
128-pin LQFP
Green Package
11/13
Available
(c)2000-2007 Genesys Logic Inc. - All rights reserved.
Page 34


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